| |
Linux |
|
| Counter |
Pentium 4 |
Description |
| PAPI_L1_DCM |
Yes |
Level 1 data cache misses |
| PAPI_L2_DCM |
Yes |
Level 2 data cache misses |
| PAPI_BRU_IDL |
No |
Cycles branch units are idle |
| PAPI_FXU_IDL |
No |
Cycles integer units are idle |
| PAPI_FPU_IDL |
No |
Cycles floating point units are idle |
| PAPI_LSU_IDL |
No |
Cycles load/store units are idle |
| PAPI_TLB_DM |
Yes |
Data translation lookaside buffer misses |
| PAPI_TLB_IM |
Yes |
Instruction translation lookaside buffer miss |
| PAPI_TLB_TL |
Yes |
Total translation lookaside buffer misses |
| PAPI_L1_LDM |
Yes |
Level 1 load misses |
| PAPI_L1_STM |
No |
Level 1 store misses |
| PAPI_L2_LDM |
Yes |
Level 2 load misses |
| PAPI_L2_STM |
No |
Level 2 store misses |
| PAPI_PRF_DM |
No |
Data prefetch cache misses |
| PAPI_BR_UCN |
No |
Unconditional branch instructions |
| PAPI_BR_CN |
No |
Conditional branch instructions |
| PAPI_BR_TKN |
Yes |
Conditional branch instructions taken |
| PAPI_BR_NTK |
Yes |
Conditional branch instructions not taken |
| PAPI_BR_MSP |
Yes |
Conditional branch instructions mispredicted |
| PAPI_BR_PRC |
Yes |
Conditional branch instructions correctly pre |
| PAPI_TOT_IIS |
Yes |
Instructions issued |
| PAPI_TOT_INS |
Yes |
Instructions completed |
| PAPI_INT_INS |
No |
Integer instructions |
| PAPI_FP_INS |
No |
Floating point instructions |
| PAPI_LD_INS |
No |
Load instructions |
| PAPI_SR_INS |
No |
Store instructions |
| PAPI_BR_INS |
Yes |
Branch instructions |
| PAPI_VEC_INS |
No |
Vector/SIMD instructions |
| PAPI_RES_STL |
Yes |
Cycles stalled on any resource |
| PAPI_FP_STAL |
No |
Cycles the FP unit(s) are stalled |
| PAPI_TOT_CYC |
Yes |
Total cycles |
| PAPI_LST_INS |
No |
Load/store instructions completed |
| PAPI_SYC_INS |
No |
Synchronization instructions completed |
| PAPI_L1_DCH |
No |
Level 1 data cache hits |
| PAPI_L2_DCH |
No |
Level 2 data cache hits |
| PAPI_L1_DCA |
Yes |
Level 1 data cache accesses |
| PAPI_L2_DCA |
No |
Level 2 data cache accesses |
| PAPI_L1_DCR |
No |
Level 1 data cache reads |
| PAPI_L2_DCR |
No |
Level 2 data cache reads |
| PAPI_L1_DCW |
No |
Level 1 data cache writes |
| PAPI_L2_DCW |
No |
Level 2 data cache writes |
